Complex Matrix Arithmetic Processor

DSP PRODUCT BRIEF BOOK

High-throughput signal processing applications often require complex matrix arithmetic, but the latency of performing matrix operations on a conventional microprocessor or DSP can be substantial. To address this problem, Athena introduces the complex matrix arithmetic (CMA) processor IP core. Built around Athena's robust and silicon-proven 5200 instruction set architecture, the CMA IP core integrates high-performance processing with a flexible, straightforward, and parameterizable programming model to make system integration a snap.

Equipped with a sophisticated advanced address generation capability, the CMA IP core hardware sustains single-cycle complex multiplication with rounding and saturation. Combined with a full instruction set for high-level complex matrix arithmetic – matrix multiplication, matrix decomposition, convolution, cross correlation, and more – the CMA IP core gives integrators true standalone operation with advanced capabilities.

At fewer than 30 K-gates, the extreme performance density of the CMA makes it suitable for ultra-low-power signal processing applications. And for high-performance applications, the multi-core CMA architecture option with a seamless inter-core communications port for parallel processing is ideal.

The CMA processor leverages Athena's high-performance, silicon-proven microprocessor and FFT technologies to produce a powerful and programmable solution for a host of complex signal processing applications. With full instruction set programmability, the CMA IP core is a true fire-and-forget solution, completing programmed algorithms without host microprocessor intervention. And, unlike a DSP or microprocessor, Athena's dedicated CMA solution is expressly designed to meet the ever-increasing throughput requirements of complex matrix arithmetic implementations. 

Interface

Both streaming and memory mapped interfaces are available for the CMA processor. The streaming interface uses a simple FIFO style interface with flow control, while the memory mapped interface uses AMBA AHB or AXI bus interface standards. Custom interfaces, designed to your specification, are also available for the CMA processor.

Capabilities

Using the high-level CMA instruction set, Athena has developed assembly code to perform a variety of different signal processing algorithms for applications including MIMO detection using an MMSE equalizer, signal detection using cross correlation, and covariance matrix generation.

Bit-Accurate Models

Bit-accurate C-language models for the CMA processor enable rapid integration into your system-level verification environment. Since they are derived directly from the implementation, you can be assured of the accuracy of these C-language models. In addition to C-language models, Athena can work directly with you during development to deliver bit-accurate MATLAB® models for the algorithms that will run on your CMA processor.