FFT & DSP cores for ASIC or FPGA implementation.

FFTs

Today’s advanced OFDM-based communications schemes, such as OFDMA, SC-FDMA, TD-SCDMA, and others need the power and performance benefits of dedicated FFT processing. Athena’s PFFT and PFFT-M FFTs use a pipelined streaming architecture to minimize latency and maximize throughput. Athena pipelined FFT cores are available in single and multiple sample-per-clock configurations, with advanced features such as internal precision growth, post scaling, and more.

Athena’s FFT cores perform both forward and inverse transforms with run-time programmable scaling and run-time programmable transform length. Data precision, maximum transform length, and throughput are customer defined at time of order. Athena FFT cores also support composite transform lengths with multiple radices, including 2, 3, 4, and 5, so a single core can perform all FFT types required by LTE, LTE-Advanced, and other OFDM-based communications schemes.

Complex Matrix Accelerator

High-throughput signal processing applications often require complex matrix arithmetic, but the latency of performing matrix operations on a conventional microprocessor or DSP can be substantial. To address this problem, Athena introduces the complex matrix arithmetic (CMA) processor IP core. Built around Athena's robust and silicon-proven 5200 instruction set architecture, the CMA IP core integrates high-performance processing with a flexible, straightforward programming model to make system integration a snap.

Equipped with a sophisticated advanced address generation capability, the CMA IP core hardware sustains single-cycle complex multiplication with rounding and saturation. Combined with a full instruction set for high-level complex matrix arithmetic – matrix multiplication, matrix decomposition, convolution, cross correlation, and more – the CMA IP core gives integrators true standalone operation with advanced capabilities.

At less than 30K gates, the extreme performance density of the CMA makes it suitable for ultra-low-power signal processing applications. And for high-performance applications, the multi-core CMA architecture option with a seamless inter-core communications port for parallel processing is ideal.