This is the choice today’s chip designers are facing. As electronics grow in complexity, higher performance is required. Yet that complexity means design risk – and managing the risk by changing, enhancing, or correcting functionality after manufacture has become a requisite part of electronics development today. This flexibility comes at a cost, however. Generally speaking, the more flexible the design, the more expensive the performance. Flexible means higher power. Flexible means bigger chips.

The microprocessor has become the de facto first choice for embedded data processing because it is flexible. As the demands on SoCs for greater functionality and performance have spiraled upwards, industry has responded with larger and faster embedded microprocessors, and multi-processor or multi-core solutions. But using a microprocessor is just one way to incorporate data processing in an electronic device. Designing the same functionality with a function-specific processor or hardware algorithmic accelerator can reduce power and improve performance considerably, and even save die area. However, the integration challenges for a function-specific processor in an SoC are greater, and the loss of flexibility could mean the difference between a product that works (or can be altered to work), and one which does not. This is the essential challenge in designing electronics today.

There is a solution to this conundrum, in a new signal processing architecture named Powerflow. Athena, an innovator of high-performance, function-specific DSP and security products and technology since 1986, bridges the gap between flexibility and performance with an entirely new architecture that brings together high-performance, function-specific accelerators with the flexibility of software control. PowerFlow does not replace today’s microprocessors, but instead works in concert with them to deliver extraordinary performance, low power, and software simplicity.

PowerFlow delivers substantial benefits at all points in the product lifecycle. During the design process, the PowerFlow implementation framework improves productivity and reduces design-in risk, and the PowerFlow software environment accelerates application development. Power savings realized with PowerFlow can translate into increased battery life for mobile applications, reduced packaging costs, and reduced cooling and energy costs. The higher performance levels enabled by PowerFlow can be used to realize greater device functionality. These benefits will deliver design and production cost savings to the manufacturer, as well as the benefit of increased product differentiation. End-users will realize these benefits in the form of greater functionality and lowered total-cost-of-ownership. Finally, by allowing the advantages of function-specific processing to be realized earlier in most product lifecycles than would otherwise be possible, PowerFlow will accelerate the maturation of new technologies.

The first hardware to leverage the PowerFlow technology will host functions from Athena’s TeraFire® security product portfolio along with Athena’s extensive signal processing portfolio to produce a design platform suitable for data security and secure software defined radio applications. An ARM926EJSTM and a suite of standard peripheral and interface functions will complete the device functionality.