Advanced Encryption Standard (AES)


Athena delivers the Advanced Encryption Standard (AES) ciphers as semiconductor intellectual property (IP) cores. Athena’s AES cores complement the market-leading TeraFire® cryptography microprocessors and standalone TeraFire cryptography accelerators. Whether your application demands high AES performance or the power savings of a dedicated core, Athena’s AES cores deliver both performance and power savings.

Athena offers AES both within its cryptography microprocessor family and as dedicated cores. Optional microprocessor bus interfaces are also available for dedicated AES core solutions.

Dedicated AES core solutions are constructed using a modular architecture, comprising cipher cores, key schedule generators, and modes modules, allowing Athena to configure an AES solution optimized for the functional, performance, area, and power requirements of your application.

Athena supports all AES modes, including ECB, CBC, CFB, OFB, CTR, CMAC, CCM, GCM, and GHASH, and even XTS mode (SP800-38E). Any modes and/or key sizes not required can be omitted to reduce area.

AES Standards Compliance

Athena’s AES cores are compliant with a range of standards, including:

  • FIPS 197
  • NIST SP800-38A (ECB, CBC, CFB, OFB, CTR)
  • NIST SP800-38B (CMAC)
  • NIST SP800-38C (CCM)
  • NIST SP800-38D (GHASH, GCM)
  • NIST SP800-38E (XTS)
  • Suite B
  • IEEE 802.1ae
  • IEEE 802.11i
  • IEEE 802.16e


  • NEW- SCA Countermeasures
  • FIPS 197 compliant AES cores
  • Supports key sizes of 128, 192, and 256-bits
  • Supports NIST SP800-38A, B C, D, and E defined modes
  • Three dedicated product series support different performance and area requirements
  • Modular architecture
  • AES support also available in TeraFire F5200 cryptography microprocessor
  • Microprocessor bus interfaces available
  • Easy SoC integration
  • Simple/differential power analysis (SPA/DPA) resistance available


  • Modular architecture enables scalable performance and optimal implementation
  • Full-width data ports maximize performance, minimize latency


  • Encrypted data storage
  • Secure communications
  • Secure processing
  • IPsec acceleration
  • E-commerce
  • VPN
  • Financial Transactions

Available Deliverables

  • Simulation model (Verilog or VHDL)
  • Synthesizable RTL ( Verilog or VHDL) and scripts
  • Targeted, timing closed netlist
  • Verification suite
  • Documentation


  • 12 months maintenance and support included